Digital Design Engineer
(Job ID: mca 2-190630)
A member of digital design and integration team working on ASIC and FPGA designs for leading edge technology. The position is located in San Jose, California.
- Design and develop new and cutting edge mixed signal Serdes IP/SoC for Consumer Applications.
- Design and integrate video centric IPs and related chip activities for SoC.
- Expected to work with architecture team and suggest architectural tradeoffs based on feature, performance requirements, system limitations and develop micro-architecture.
- Implement RTL and synthesize design within constraints of area, timing, performance and power.
- Involve in design reviews, test plan and verification coverage definition.
- Strong analytical and communication skills.
- Experienced in complex digital IP design, and/or SoC integration.
- Strong understanding of hardware design, timing analysis, clock domain crossing, lint and verification.
- Fluency in Verilog/VHDL, verification methodologies, tool flow, scripting languages and ASIC front end tools.
- Experience in IP, Algorithm Model development using C/C++/ Matlab
- Ability to analyze design and work with verification team to define verification plan and debug design.
- Hands on lab bring-up and debug experience and familiarity with lab instruments.
- Able to work in the U.S. without sponsorship (no visa sponsorship)
- BS/MS degree or foreign equivalent in Electrical Engineering, Electronics Engineering or related engineering field with a minimum of 10 years of relevant experience.
- Submit resume and credentials to email@example.com