ASIC Intellectual property

By using IP from MegaChips’s extensive IP portfolio, customers can complete their ASIC designs faster, enabling their product to get to market faster.

MegaChips’s corporate strategy is to focus on our core competencies and work with partners for other items.   A core competency for MegaChips is developing physical IP, such as SerDes, PLLs, CDRs, ADCs, DACs, etc.   Key features of MegaChips’s physical IP include:

  • VHDL/Verilog models for simulation during design.
  • MegaChips test chips to prove the designs in silicon.
  • Guaranteed (fixed) timing in hard layout when necessary.
  • Static timing analysis support to verify performance.
  • High fault coverage by means of pre-generated test vectors

Digital IP, which can easily be synthesized to target any ASIC technology, is readily available from a wide variety of sources today.  The digital IP in MegaChips’s IP portfolio is acquired from established, well-known partners such as ARM, MIPS, CEVA, StarCore, Mentor, etc.


Figure 1: MegaChips IP Strategy

MegaChips IP Partners Program

Unfortunately, a key obstacle to the proliferation of third-party digital IP is the negotiation of license agreements, which can take more time to complete than the technical evaluation of the IP, delaying the ASIC’s project schedule in the process. 
 
To simplify the usage of third-party digital IP, MegaChips has negotiated license agreements with selected third-party IP suppliers, its “IP Partners”.  Customers who select IP from MegaChips’s IP Partners can be assured that MegaChips can quickly acquire the IP on their behalf, speeding their ASIC’s time-to-market.  MegaChips’s IP Partners include ARM, MIPS, CEVA, Mentor Graphics, Mysticom, SafeNet, and Sonics.